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International Journal of Scientific and Engineering Research
ISSN Online 2229-5518
ISSN Print: 2229-5518 1    
Website: http://www.ijser.org
scirp IJSER >> Volume 3,Issue 1,January 2012
FPGA Prototyping of Hardware Implementation of CORDIC Algorithm
Full Text(PDF, )  PP.189-194  
Er. Manoj Arora, Er. R S Chauhan, Er.Lalit Bagga
CORDIC; FPGA; Discrete Fourier Transform (DFT); Discrete Cosine transform (DCT); Iterative CORDIC; Pipelined CORDIC,SVD.
In 1959 J. E. Volder presents a new algorithm for the real time solution of the equations raised in navigation system. This algorithm was the best replacement of analog navigation system by the digital. CORDIC algorithm used for the fast calculation of elementary functions like multiplication, division, trigonometric functions, logarithmic function, and various conversions like conversion of rectangular to polar coordinate, conversion between BCD and binary coded information. In the present time CORDIC algorithm have a number of applications in the field of communication, 3-D graphics, signal processing and a lot more. This review paper presents the prototype of hardware implementation of CORDIC algorithm using Spartan –II series FPGA, with constraint to area efficiency and throughput architecture
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[5] Pramod K. Meher, Javier Valls, Tso-Bing Juang, K. Sridharan and Koushik Maharatna, “50 Years of CORDIC: Algorithms, Architectures and Applications” IEEE transactions on circuits and systems—I: regular papers, vol. 56, no. 9, september 2009.

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