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International Journal of Scientific and Engineering Research
ISSN Online 2229-5518
ISSN Print: 2229-5518 11    
Website: http://www.ijser.org
scirp IJSER >> Volume 3,Issue 11,November 2012
Design and Implementation of VLSI Architecture for Mixed Radix FFT
Full Text(PDF, )  PP.346-351  
Author(s)
Dr.Y.Padma Sai, Y.Swetha Sree
KEYWORDS
Continuous data flow, Radix-2 Fast Fourier transform, Radix-4 Fast Fourier transform, mixed radix FFT.
ABSTRACT
The main objective of this paper is to design and implement the VLSI architecture for Mixed Radix FFT. This architecture is proposed for memory based Fast Fourier transform (FFT) to support less memory size and area reduction .The pipelined architecture w
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