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International Journal of Scientific and Engineering Research
ISSN Online 2229-5518
ISSN Print: 2229-5518 9    
Website: http://www.ijser.org
scirp IJSER >> Volume 2, Issue 9, September 2011
Implementation of Generic Algorithm Using VHDL on FPGA
Full Text(PDF, 3000)  PP.  
Prashant Sen, Priyanka Pateriya
Generic Algorithm, VHDL, FPGA
Architecture. The development of a flexible very-large-scale integration (VLSI) for GA has been proposed in this paper. For the hardware architecture, we has develop on a random number generator (RNG), crossover, and mutation based on flexibility structure. This structure can dynamically perform to the 3 types chromosome encoding: binary encoding, real-value encoding, and integer encoding. The overall structures has been designed and synthesized by VHDL (VHSIC hardware description language), simulation by ModelSim program, and then implemented on FPGAs (Field programmable gate arrays). This hardware architecture that our design work very well flexible for the 3 groups problem examples: combinatorial optimization problems, function optimal problems.
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