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International Journal of Scientific and Engineering Research
ISSN Online 2229-5518
ISSN Print: 2229-5518 6    
Website: http://www.ijser.org
scirp IJSER >> Volume 2, Issue 6, June 2011 Edition
Low-Power 1-bit CMOS Full Adder Using Subthreshold Conduction Region
Full Text(PDF, 3000)  PP.  
Author(s)
Vishal Sharma, Sanjay Kumar
KEYWORDS
Low-Power, Subthreshold Conduction Region, Full Adder.
ABSTRACT
In balancing the trade-off between power, area and performance, numerous efforts have been done. However, not much study has been done at the two extreme ends of the design spectrum, namely the ultra low-power with acceptable performance at one end (the main concern of this paper), and high performance with power within limit at the other. This paper is based on the exclusive use of subthreshold conduction currents to perform circuit operations, yielding a dramatic improvement in power consumption compared to traditional circuit design approaches. This improvement makes it feasible to design extreme low-power circuits with such an approach. The CMOS digital circuits for this work have been designed using standard TSMC 0.18 μm Technology.
References
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