IJSER Home >> Journal >> IJSER
International Journal of Scientific and Engineering Research
ISSN Online 2229-5518
ISSN Print: 2229-5518 5    
Website: http://www.ijser.org
scirp IJSER >> Volume 3,Issue 5,May 2012
An Implementation method of Encrypting Partial Bitstream Based on FPGA
Full Text(PDF, )  PP.171-174  
Author(s)
Abhishek Kumar, Kumar Gaurav, Anshuman kumar Gautam
KEYWORDS
AES, CRC, encrypting partial bitstream, FPGA, partial reconfiguration.
ABSTRACT
Partial reconfiguration of FPGAs requires loading partial bitstream. But loading a faulty or corrupted partial bitstream might cause some errors when undergoing reprogramming; what's more, it may damage the FPGA device. A encrypt method based on cyclic redundancy check (CRC) before loading them into the device is introduced. The encrypt method of partial bitstream can realize the data integrity and security of FPGA Partial Reconfiguration.
References
Untitled Page