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International Journal of Scientific and Engineering Research
ISSN Online 2229-5518
ISSN Print: 2229-5518 2    
Website: http://www.ijser.org
scirp IJSER >> Volume 2, Issue 2, February 2011
Design of Low-Power CMOS Cell Structures Using Subthreshold Conduction Region
Full Text(PDF, 3000)  PP.  
Vishal Sharma, Sanjay Kumar
Low-Power, Leakage Current, Subthreshold Conduction
Subthreshold (leakage or cut-off) currents are a necessary evil in traditional VLSI design methodologies. These currents increase exponentially as threshold voltage scales, creating a serious problem for traditional design approaches. This work is based on the exclusive use of subthreshold conduction currents to perform circuit operations, turning this problem into an opportunity. It yields a dramatic improvement in power consumption compared to traditional circuit design approaches. This improvement makes it feasible to design extreme low-power circuits with such an approach. The CMOS digital circuits for this work have been designed using standard TSMC 0.18 μm Technology.
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