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International Journal of Scientific and Engineering Research
ISSN Online 2229-5518
ISSN Print: 2229-5518 2    
Website: http://www.ijser.org
scirp IJSER >> Volume 2, Issue 2, February 2011
Optimized AES Rijndael implementation on embedded controller R8C
Full Text(PDF, 3000)  PP.  
Author(s)
R.Elumalai, Dr.A.R.Reddy
KEYWORDS
R8C microcontroller, AES Rijndael, optimization.
ABSTRACT
Advanced Encryption Standard (AES) Rijndael algorithm has gained popularity as it is deployed in various embedded systems. Realization of AES algorithm on microcontroller with minimum memory will be useful for deploying it in low cost applications. R8C microcontroller from Renesas is one of the popular microcontrollers in industrial application, being low cost and versatile processor having all peripherals like three UART, three timers, SSU, I2C, LIN, USB, 10 channels ADC with operating frequency at 20MHz. This paper discusses the implementation of AES on R8C controller its speed and memory requirement for the same.
References
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[2] NIST, Advanced Encryption Standard (AES), (FIP PUB 197), November 26, 2001

[3] Baker.W.“Introduction to analysis of Data Encryption Standard”, Laguna Hills CA; Aegean park press, 1991

[4] “cryptography and Network security principles and practices” by William Stallings, Eastern economy edition publication 4th edition 2006

[5] A Specification for Rijndael, the AES Algorithm v3.3, Brian Gladman, May 2002

[6] www.esat.kuleuven.ac.be/~rijmen/rijndel/ Rijndael home site

[7] A.J. Elbert, E. Yip, B. Chetwynd, C. Paar: “An FPGA Implementation and Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists”, IEEE Transactions on VLSI, August 2001, vol. 9, no. 4, pp. 545-557.

[8] A Communications Security Architecture and Cryptographic Mechanisms for Distributed Sensor Networks DARPA SensIT Workshop, Oct 8, 1999

[9] Helion Technologies. High Performance (Rijndael) cores, 2001. Amphion Semiconductor. CS5210-40: High Performance AES Encryption Cores, 2001

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