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International Journal of Scientific and Engineering Research
ISSN Online 2229-5518
ISSN Print: 2229-5518 12    
Website: http://www.ijser.org
scirp IJSER >> Volume 2, Issue 12, December 2011
Comparative Simulation of MBIST using March-Test Algorithms
Full Text(PDF, 3000)  PP.  
Er.Manoj Arora, Er.Shipra Tripathi
BIST, MBIST, Memory faults, Memory Testing
Memories are an important aspect as there is an growth in submicron technologies. Memories may be RAM, ROM, DRAM etc becomes difficult to test as the system complexity increases. These embedded memories are on SOCs in which the embedded RAM memory is very hard to test because its testing needs a large number of pattern stimuli to be delivered to memory and retrieving a huge data. So time factor and difficulty forces us to use Memory BIST. BIST implies Built In Self Test,is a design technique in which,parts of circuits is use to test the circuit itself. In memory BIST,memory testing algorithms are implemented on chip which are faster than the conventional memory testing. March test algorithms are suitable for memory testing because of its regularity in achieving high fault coverage. This paper discussed about Memory BIST by applying march algorithm
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