Realization of Timers, Counters and Shift Registers for Programmable Controller Using Ladder Diagram [ READ ]
Shobha S, S. Ramachandran
Programmable Controller is the leading edge technology in control automation systems finding applications in modern factories. As Ladder Logic Diagram implementations pretenses a stumbling block in the design of complex and real-time Programmable Controllers, it has become the main modeling method of Programmable Controllers. Ladder diagram programming lets Programmable Controllers to perform different types of tasks, including Boolean logic, timing, counting, shifting, arithmetic and special functions. This paper presents the RTL Verilog design of timing, counting, drum counter and shift register operations using Ladder Diagram for Programmable Controller. The paper describes the architecture of timers, counters, drum counters and shift registers. The Ladder Logic Diagrams are targeted for implementation in Field Programmable Gate Arrays. Simulation results of the proposed architecture shows promising results.
Shobha S, S. Ramachandran
Programmable Controller is the leading edge technology in control automation systems finding applications in modern factories. As Ladder Logic Diagram implementations pretenses a stumbling block in the design of complex and real-time Programmable Controllers, it has become the main modeling method of Programmable Controllers. Ladder diagram programming lets Programmable Controllers to perform different types of tasks, including Boolean logic, timing, counting, shifting, arithmetic and special functions. This paper presents the RTL Verilog design of timing, counting, drum counter and shift register operations using Ladder Diagram for Programmable Controller. The paper describes the architecture of timers, counters, drum counters and shift registers. The Ladder Logic Diagrams are targeted for implementation in Field Programmable Gate Arrays. Simulation results of the proposed architecture shows promising results.
