Design and implementation of multiport memories for re configurable devices [ READ ]
Arun S.Tigadi, Deepti. S.P, Hansraj Guhilot.
The included block RAMs in the fabric have typically only two ports, so the multi-ported memories have become challenging to implement with FPGAs. Only by using logic elements or by combination of multiple block RAMs, the multi-ported memories can be designed. A new design is proposed in this paper called Live Value Table. This design has more number of read ports and write ports compared to other methods. The other method called XOR based approach is also introduced ,this requires more area compared to Live Value Table based approach.
Arun S.Tigadi, Deepti. S.P, Hansraj Guhilot.
The included block RAMs in the fabric have typically only two ports, so the multi-ported memories have become challenging to implement with FPGAs. Only by using logic elements or by combination of multiple block RAMs, the multi-ported memories can be designed. A new design is proposed in this paper called Live Value Table. This design has more number of read ports and write ports compared to other methods. The other method called XOR based approach is also introduced ,this requires more area compared to Live Value Table based approach.
