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Performance Study of Turbo Code with Interleaver Design
« on: August 21, 2011, 03:48:11 am »
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Author : Mojaiana Synthia, Md. Shipon Ali
International Journal of Scientific & Engineering Research Volume 2, Issue 6, June-2011
ISSN 2229-5518
Download Full Paper : PDF

Abstract— This paper begins with an investigation of the optimization of binary turbo code through good interleaver design. For this purpose, different types of interleaver have designed here and have evaluated their performance.  Basically the performances of the turbo code using block interleaver, helical interleaver, random interleaver and odd-even interleaver have evaluated. From this investigation it has been seen that for small code length the performance of the block interleaver is superior in non-puncturing case and the performance of the odd-even interleaver is superior in puncturing case, but for large code length the performance of the random interleaver is better in both of puncturing and non-puncturing condition. In this paper, it has investigated that the performance of the odd-even interleaver (block interleaver with odd number of rows and columns) significantly increased in puncturing conditions.
Index terms— Turbo encoder; Turbo decoder; Interleaver; code rate; Puncturing; Nonpucturing.
 
Introduction
Due to increasing demand for information exchange in modern civilization, the transfer of information from the source to its destination has to be done in such a way that the quality of the received information should be as close as possible to the quality of the transmitted information. Channel codes are used as an invaluable tool for this purpose. The channel encoder adds code bits to the transmission bit stream, based on the data bits at its input. These extra bits a reused by the channel decoder at the receiver to correct errors introduced into the transmission stream by a noisy or fading channel. But, there are two main disadvantages of error correcting codes. Firstly, the injection of extra bits into the transmission stream, thus increasing the bandwidth needed to transmit the signal. A second disadvantage is that they add complexity to the design of a communications system. In this paper some technique has introduced to overcome these problems.
Turbo Encoder
A general Turbo encoder is shown in Figure 2.1. It employs two identical systematic recursive Convolutional encoders connected in parallel with an interleaver preceding the second recursive convolutional encoder. The two recursive convolutional encoders are called the constituent encoders of the Turbo encoder. The information bits are encoded by both RSC encoders. The data frame, length of size N, inserts directly into the first encoder and after interleaving of length N, it feeds the second encoder. Therefore, N systematic bits can generate 2N parity bits and its gives a code rate of 1/3. However, it can be removed some of the parity bits in order to increase the coding rate by means of puncturing process. Furthermore, it is also possible to employ more than two component codes. However, in this paper it concentrates entirely on the standard turbo encoder structure using two RSC codes.
 
Interleaver
The interleaver design is a key factor which determines the good performance of a turbo code. The output sequences of RSC encoder usually have high weight. However, some input sequences still cause the output sequence of RSC encoder to generate low weight codeword.  Therefore, the interleaver scrambles the input sequence and generates randomness to the input sequence as a result high codeword can obtain. Some of the useful inter-leaver used in turbo code is discussed in the following sections.
Block Interleaver
Block interleaver is easy to implement in practice. This simplest interleaver is a memory in which data is written row–wise and read column–wise. It is also known as the “row–column” interleaver.

X1   X2   X3   X4
X5   X6   X7   X8
X9   X10   X11   X12
X13   X14   X15   X16
X17   X18   X19   X20
Table (3.A.1): Writing data row–wise in memory.
X1   X5   X9   X13   X17   X2   X6   .……
Table (3.A.2): Reading data column–wise from memory.
   Helical Interleaver
A helical interleaver writes data into row–wise but reads data diagonal–wise. An example of helical interleaver is shown below:
X1   X2   X3
X4   X5   X6
X7   X8   X9
X10   X11   X12
X13   X14   X15
Table (3.B.1): Writing data row–wise in memory.
X13   X11   X9   X4   X2   X15   X10   …
Table (3.B.2): Reading data diagonal–wise from memory.
   Odd-Even Interleaver
An odd-even interleaver is a block interleaver in which the number of rows and columns must be odd numbers.
   Random Interleaver
The most used turbo code interleaver is the random interleaver. It basically generates a mapping between the input and the output positions. It can be designed for arbitrary length of input bits. If the length of the input is N, the mapping set will have N! combinations and chooses one combination to permute the input bits. A simple random interleaver to permute data is shown below:
 
Turbo Decoder
In a turbo encoder with T constituent encoders, the encoder output contains a single systematic output and T parity outputs from the RSC encoders (assuming no puncturing), T – 1 of which operate on an interleaved version of original data block. Thus, the output of the turbo encoder can be viewed as the output of T independent RSC encoders, except the systematic information only need be transmitted for one of the encoders.  The decoder can reconstruct the systematic bits for the other encoders because it knows the interleaving patterns that were used.  Thus, the decoder can be decomposed into T convolutional decoders with each one operating on the output of a single constituent encoder.  In order to get the best possible estimate of the original message, these separate decoders must be able to share the results of their calculations.  To accomplish this, turbo decoders use iterative feedback decoding. Figure 4.1 shows a schematic of a turbo decoder for the classical turbo code with T=2.
 
General Turbo Decoder.
This turbo decoder corresponds to the turbo encoder of figure 2.1.  The first decoder uses the systematic information〖 x〗_k, the output from the first constituent encoder y_1k, and a priori information from the second decoder〖 L〗_(a2,k), to calculate soft estimates of the original data in the block known as a log-likelihood ratio (LLRs), Λ1. The systematic and a priori information are subtracted from Λ1 in order to prevent positive feedback.  What is left over is the new information calculated by the first decoder L_(e1,k), known as the extrinsic information.  This extrinsic information will be used as a priori information by the second decoder.  The second decoder uses this a priori information along with the systematic information, and the output of the second constituent encoder〖 y〗_2k.  However, y_2k was calculated from an interleaved version of x_k, so both the systematic information and extrinsic information from the first decoder must be interleaved (forming x_k^~ and  〖 L〗_(a1,k), respectively) before being used in the second decoder.  The second decoder produces the extrinsic information 〖 L〗_(e2,k )that is de-interleaved and then fed back to the first encoder to be used as a priori information〖 L〗_(a2,k). After the first decoding cycle has completed, the decoder is not taking in new inputs.  Instead, it is iterating toward a best estimate of the transmitted data using the received values that it now has stored in memory.  After I iterations, the feedback loop is broken and the LLRs produced by the second decoder are de-interleaved one final time to put them in the same order as the original data block and a hard limiter makes the final bit decisions to produce the decoded block.

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