Implementation of Generic Algorithm Using VHDL on FPGA
|
Full Text(PDF, 3000) PP.
|
|
Author(s) |
Prashant Sen, Priyanka Pateriya |
|
KEYWORDS |
Generic Algorithm, VHDL, FPGA
|
|
ABSTRACT |
Architecture. The development of a flexible very-large-scale integration (VLSI) for GA has been proposed in this paper. For the hardware architecture, we has develop on a random number generator (RNG), crossover, and mutation based on flexibility structure. This structure can dynamically perform to the 3 types chromosome encoding: binary encoding, real-value encoding, and integer encoding. The overall structures has been designed and synthesized by VHDL (VHSIC hardware description language), simulation by ModelSim program, and then implemented on FPGAs (Field programmable gate arrays). This hardware architecture that our design work very well flexible for the 3 groups problem examples: combinatorial optimization problems, function optimal problems.
|
|
References |
|
1. T. Tatsuhiro, M. Yoshihiro, S. Naoki, Y. Keiichi, and I.
Minoru, “Flexiblen Implementation of Genetic Algorithm
on FPGAs”, IEEE Int.Conf., 2008.
2. P. Vipapun and K. Pinit, “A High-Speed Hardware of
the Geneticn Algorithm for Combinatorial Optimization
Problem”, in Proc.3rd IEEE Int. Conf. on Communication
and Information Technology, vol. 2, September
2003.
3. N. Shruthi and P. Carla, “Hardware Implementation
of the Genetic Algorithm Modules for Intelligent System”,
IEEE Int. Conf., 2005.
4. F. Pradeep, S. Hariharan, K. Srinivas, K. Didier, S.
Adrian, Z. Ricardo, and R. Ramesham, “A Customizable
FPGA IP Core Implementation of a General Purpose
Genetic Algorithm Engine”, IEEE Int. Conf.,
2008.
5. J. Yutana and C. Prabhas, “Cellular Compact Genetic
Algorithm for Evolvable Hardware”, IEEE Int. Pro. of
ECTI-CON, 2008.
6. G. Xianyue, L. Hongyan, and W. Shufeng, “A Dynamic
Byte Encoding Genetic Algorithm for Numerical
Optimization”, IEEE Int. Conf. 3rd on Innovative
Computing Information and Control(ICICIC’08),
2008.
7. D. Yuan-Ming and W. Xuan-Yin, “Real-coded adaptive
genetic algorithm applied to PID parameter optimization
on a 6R manipulators”, IEEE Int. Conf. 4th
on Natural Computation, 2008.
8. M. Mansouri, M. Aliyari Shoorehdeli, and M. Teshnehlab,
“Integer GA for Mobile Robot Path Planning
with using another GA as Repairing function”,IEEE
Int. Conf. on Automation and Logistic, September
2008.
|
|
|