Design of Low-Power CMOS Cell Structures Using Subthreshold Conduction Region
Full Text(PDF, 3000) PP.
| Author(s) |
|Vishal Sharma, Sanjay Kumar|
| KEYWORDS |
Low-Power, Leakage Current, Subthreshold Conduction
Subthreshold (leakage or cut-off) currents are a necessary evil in traditional VLSI design methodologies. These currents increase exponentially as threshold voltage scales, creating a serious problem for traditional design approaches. This work is based on the exclusive use of subthreshold conduction currents to perform circuit operations, turning this problem into an opportunity. It yields a dramatic improvement in power consumption compared to traditional circuit design approaches. This improvement makes it feasible to design extreme low-power circuits with such an approach. The CMOS digital circuits for this work have been designed using standard TSMC 0.18 μm Technology.
 S. Hanson, B. Zhai, K. Bernstein, D. Blaauw, A. Bryant, L. Chang, K. K. Das, W. Haensch, E. J. Nowak and D. Sylvester, “Ultralow-voltage, minimum-energy CMOS,” IBM Journal of Research and Development, vol. 50, no. 4-5, pp. 469–490, 2006.
 A. P. Chandrakasan, S. Sheng and R. W. Brodersen, “Low Power CMOS Digital Design,” IEEE Journal of Solid-state Circuits, vol. 27, no. 4, pp. 473-484, April 1999.
 K. Ragini and B. K. Madhavi, “Ultra Low Power Digital Logic Circuits in Subthreshold for Biomedical Applications,” Journal of Theoretical and Applied Information Technology, 2005.
 K. Roy, S. Mukhopadhyay, and H. Mahmoodi-Meimand, “Leakage current mechanisms and leakage reduction techniques in deep-submicrometer cmos circuits,” in Proceedings of IEEE, vol. 91, no. 2, pp. 305-327, 2003.
 R. Corless, G. Gonnet, D. Hare, D. Jeffrey and D. Knuth, “On the Lambert W function,” Advance in Computational Mathematics, vol. 5, pp. 329-359, 1996.
 A. Wang, B. H. Calhoun and A. P. Chandrakasan, Subthreshold Design For Ultra Low-Power Systems, Springer, USA, 2006.
 R. M. Swanson and J. D. Meindl, ""Ion-Implanted Complementary MOS Transistors in Low-Voltage Circuits,"" IEEE Journal of Solid-State Circuits, vol. 7, no. 2, pp. 146-153, April. 1972.
 S. M. Kang and Y Leblebici, CMOS Digital Integrated Circuits: Analysis and Design, 3rd ed, McGraw Hill, 2004.