The research paper published by IJSER journal is about Intelligent Control Design of Pmsm Drive For Automotive Applications 1

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“Intelligent Control Design of PMSM Drive for

Automotive Applications”

Mr. R. G. Shriwastava

Dr.M.B.Diagavane

Dr.S.R.Vaishnav

Assistant Professor &Head

Principal

Principal

Electrical Engineering Deptt.

S .D .college of Engineering,Wardha

G.H.Raisoni.Academic COE Nagpur

Email:- rakeshshriwastava@yahoo.co.in Email:- mdai@rediffmail.com Email:- srvai@rediffmail.com
Bapurao Deshmukh College Of Engineering, Sewagram (Wardha)

Abstract - This paper describes the practical design considerations of Permanent Magnet Synchronous Motor (PMSM) drive for Electric Power Steering (EPS) Used in Automotive application. The design of various Blocks of PMSM Drive is discussed in detail. The experimental results show that the control & power circuit used in the design can achieve excellent and consistent torque & speed performance and is well suited for EPS application.

Keywords— Electric power Steering, Permanent magnet synchronous machine. Permanent magnet material, MOEFET Inverter circuit, clock signal generator, address generator, EPROM.

—————————— ——————————

I. Introduction

PERMANENT-MAGNET synchronous motor (PMSM) drives are, due to their high efficiency and power density, attractive for a variety of applications [1], [2]. In vehicles, electric drives can replace traditional mechanical actuators to achieve advantages such as higher efficiency and improved dynamical performance. Electric Power Steering(EPS) systems have attracted much attention for their advantages with respect to improved fuel consumption(saving 3~6%, reduction of weight 3~5kg) and have been widely adopted as automotive power steering equipment in recent years. The permanent magnetic field Direct Current (DC) motors are widely used for EPS system, but nowadays many engineers are trying to adopt the Permanent Magnet Synchronous motor(PMSM). It is because the fact that motor vibration and torque fluctuations are directly transferred through the steering wheel to the hands of the driver must be considered For automotive applications, reliability and cost are major concerns. Generally, power electronic converter topologies with reduced component counts can reduce the size, weight, and cost of the converter and can also improve reliability [3].

Permanent magnet synchronous motor is used here with three stator windings for the motor operation. Three supply voltages are obtained with the help of three phase MOSFET bridge inverters. MOSFET bridges are fed with fixed dc voltage which is obtained by rectifying ac voltage available from ac mains with the help of Diode Bridge. Shunt capacitor filter is used for filtering purpose. Operation of the MOSFET Bridge is controlled by the control circuit. Gating pulses required to turn the MOSFET ON are obtained from the control circuit. By controlling the frequency of the gating
pulses frequency of the output from MOSFET bridge is controlled. Control circuit consists of clock generator counter and EPROM. First data required to generate gating pulses is calculated and is stored in EPROM. This data is outputted at the output of the EPROM by generating the address of the memory location with the help of 4 bit binary ripple counter. Clock input required for the operation of the counter is generated using IC 555 in astable mode. Frequency of the gating signals coming out of EPROM is dependent on the frequency with which addressing is done which is turn dependent on the clock frequency. Thus by varying the clock frequency of gating signal is varied. If frequency of gating signal is varied, then the MOSFET bridge output frequency is also varied. Thus we obtain variable frequency output. Gating signal outputted by EPROM cannot be directly applied to MOSFET bridge as they are very weak. So isolator and driver circuit is used. Necessary isolation of low power control circuit from high power bridge circuit is obtained by using opt isolator. In interior or buried magnet synchronous motor (IPM), the magnets are mounted inside the rotor. The motor is connected on load and its speed depends on the stator supply frequency.
This paper presents some practical design considerations and trade-offs for the PMSM drive system for EPS application. Section 2 describes design considerations. Section 3 presents some experimental results. Section 4 is the conclusion...

II. PMSM Drive Design Considerations

The following aspects of the system design are described
in this section: PMSM drive architecture, Design of Diode bridge rectifier and filter circuit, Variable Frequency mode design, Design of main power circuit, Design of Isolator and driver circuit, Design of Protection circuit, Design of comparator.

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= 274.74 v

= sin-1 V0(min) / V0 (max)
= sin-1 x 274.74 / 325.26
= 57.630
diode conduction angle= 90 –
= 90 – 57.630
= 32.360
Ip (surge current) = T/T1 x Idc
= 3600 / 32.360 x 1.5
= 16.68 A
3.1.1 Diodes:-
VR (max > Vm
> 325 Volts
If (ave) > I0
> 1.5 A
Isurge > Ip
> 17 A
selected diode are D1 to D8 = IN 5408

B. Variable Frequency mode design

re 1: System Block Diagram of the PMSM Drive

A. Design of Diode bridge rectifier and filter circuit


Impute line voltage = 230 Vac Output dc voltage = 300 vdc Load current = 1.5 Amp.

Vm = 2 x 230
= 325.26 v

Vdc = 2 Vm/ =2 x 325.26 /
= 207.07 (without filter)
But with Capacitor filter

Figu

In this we first consider the design of the control circuit. Let us start with the clock generator which is given to the address generator circuit. For generating the clock frequency time IC 555 is used in its astable mode.
The EPROM used in the circuit is IC 2764 from which 8 address lined are used. So one cycle of operation corresponds to 256 locations accessed by the EPROM. These address lined are generated by the counter IC 7493 to which output of 555 is connected. Thus it can be seen that the clock generator frequency is 256 times that of output frequency.
Let us assume the desired output frequency to lie in the range of 10 to 60 Hz.
Hence the timer frequency is given as

f min = 10 x 256 = 2560 Hz

fmin = 1 / fmax = 65104 x 10-5 sec.

The output voltage and the capacitor voltage

waveforms are as shown in fig. 2.1





=¼ 3 x 50 x 0.48 x 200

= 300 f
Selected two capacitor C1 = 150 f, 400 v

C2 = 150 f, 400 v
And are connected in parallel to get total 300 f we have
Vac (max) = Vm = 325.26 v
Vo (min) = Vm = Vm – Vrpp
= 325.36 – 50.52

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Fig. 2.1 Output voltage and capacitor voltage waveform

The capacitor is periodically charged and discharged between
2/3 Vcc and 1/3 Vcc respectively. The time during which the capacitor charges from 1/3 Vcc to 2/3 Vcc is equal to the time the output is high and is given by,
tc = 0.69 (RA+RB) C
td = 0.69 (RB) C
The total period for output waveform is given by,
T = tc + td = 0.69 (RA+2RB) C The frequency of oscillation is given by,

f0 = 1/ T = 1/0.69 (RA+2RB) C

= 1.45 / (RA+2RB) C Now, consider Tmax = 6.5104 x 10-5 sec.
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For fmax = 15360 kHz.
Selecting C = 0.1 F and RB = 267 we have
Tmax = 0.69 [ RA min + 2 RB ] C
6.5104 x 10-5 / 0.69 x 0.1 x 10-6 = RA min + 2RB
RA min = 409.53
As the frequency can be varied to get variable frequency at

the output, this is the minimum resistance that must be, connected in the circuit as the fixed resistance.
Selecting a resistance of 470 , ¼ w for RA in this position.
Now consider,
Tmin = 3.9062 x 10-4 sec.
Tmin = 0.69 [ RA min + 2 RB ] C

output of 2-4 bit binary counters.
Table 2

RA max = ( 0.9062 x 10-4 / 0.69 x 0.1 x 10-6 ) - 2(267) RA max = 5127.15
Out of this, 470 is selected as fixed resistance. Remaining resistance = 4657.15
This remaining resistance must be variable so as to
Pin 5 of each IC is provided with +5V supply. The output of
these IC’s act as address to the EPROM.

EPROM

0

get frequency variations. Thus a pot of 4K7 is used here.
The data for 120
mode is stored in EPROM in 256

Address generator

For generating the address for the EPROM counter IC 7493 is used. It is used as a 4 bit binary counter. It is 14 pin package. In order to use their maximum count length such as decade, divide by twelve or four bit binary etc., the CKB input is connected to the QA output. The input count pulses are applied to CKA input and the outputs are as shown in following table. Each of these monolithic counters contain 4 master slaves flip flops and additional gating to provide a divide by two counter. Table 1
output of 4-bit binary counter.
The 555 frequency is internally divided by two and then successively the frequency gets divided by two. The EPROM data is stored in 256 locations so address that is to be generated is also 256. with one counter 16 locations can be addressed so one more IC is connected. The QD output of first IC is given as
clock input CKA to second IC. The corresponding outputs are
tabulated as follows.
locations. The address lines required for accessing these
locations is given as
2N = 256 Hence N = 8
Thus minimum 8 address lines are required. As the data is permanent and is not changing, EPROM 2764 is used for this purpose. The EPROM data generates output signals on six different data lines for the six MOSFETs. The widths of the pulses are precalculated and loaded into the EPROM. The data stored in EPROM is square pulse signal for 1200 mode. It is taken out on D0 to D5 lines. For MOSFET 1 to 6, the corresponding data lines are D0 to D5. Thus the total data is filled in 256 locations.
There are 13 address lines out of that only 8 (A0 –A7) address lines are used. The rest lines are grounded. The outputs of counter Ics are connected to the respective address lines of EPROM. Total addressed generated by the EPROM are 256 which are shown in Appendix.
Out of 8 data lines, only 6 data lines 00- 05 (D0 – D5) are used. One cycle corresponds to 3600
Thus we have, 3600 = 256 location 1200 = 83.33 85 location
The gate pulses for the MOSFET are provided for
1200 while for 600 no gate pulse is provided. The gate pulse pattern is shown in the fig.2.2.

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R = Vd /0.4 I0 = 500 / 0.4 x 8

= 156.75
Selected resister R7 to R14 = 150 2 w each.
D.Design of Isolator and driver circuit

Fig. 2.2 The gate pulse pattern for the MOSFET

The data stored in EPROM in 256 locations is attached in
Appendix.
C.Design of main power circuit
MOSFET bridge
While selecting MOSFET
Vdc > 0.707 x ma
Vdc [let ma = 1 (max)]
> 0.707 x 1 x 300
> 212.1 volts
Vgs > 12 volts
Id > IL max
> 2 Amps
Switching time should be as small as possible selected
MOSFET is IRF 840
The gate pulse is applied to isolator through buffer. The used buffer using IC LM324, which has following features
1) Eliminates need for dual power supply.
2) Compatible with all forms of logic.
3) Internally frequency compensated for unity gain.
4) Low input bias current = 45 nA

5) Low input offset voltage = 2 mv dc
6) Differential input voltage = Vcc
7) Large output voltage swing = 0 to (+V – 1.5 ) V
Specifications:

Output current = 40 mA dc
Supply voltage = 32 v or 16 v dc
Selected opto Coupler is MCT2E which has got IRED and
phototransistor internally. The maximum forward current for
LED = 20 mA

Peak output voltage of LM324 will be = 12 – 1.5 = 10.5
Vi 11 v
Let maximum current for LED to be selected as 8 mA
R = Vi – Vf (LED) / If

= 11 – 1.8 (max) / 8 mA

= 1150 selected R = 1.1 k ¼ w with this value
If (max) = 11 – 1.6 (typ) / 1.1 k
= 8.54 mA
which is acceptable value for MCT2E
Snubbrer Circuit
From data sheet of MOSFET
Turn off delay = 90 ns, Fall time = 30 ns
Let to be design for maximum current capacity of MOSFET
i.e. 8 Amps
C = I0 T off / 2 Vd

= 8 x 120 ns / 2 x 212.5
= 0.0014 F
for better performance large capacitor C to be selected. So that

MOSFET voltage rises slowly and takes longer time to reach peak value of voltage capacitor C7 to C14 are selected as
0.1 F, 630 volt each. The maximum load current is taken to
be 8 A and maximum voltage reading of MOSFET is 600 volt,
Free wheeling Diode
If (ave) = 8 A
VK = 600 V
Selected diodes D17 to D24 = IN5408
Series resister with capacitor should be chosen so that the
peak current through it is less than reverse recovery current. In
of the free wheeling diodes
Vd / Rs = In
But generally
In is limited 0.4 I0

selected R20 to R23 & R44 to R47 = 1.1 k ¼ w each.
MCT2E requires supply voltage = 15 Vdc

So we design power supply for the rating 100 mA. Using transformer of 12-0 secondary voltage.
Vm (sec) = 2 x 12 = 17 V Selected ripple voltage Vrpp = 0.5 V
Vdc = Vm – 0.7 (diode drop) – (0.5 /2)
= 16 V

r = Vrms / Vdc
= Vrpp / 2 3 Vdc
= 0.5 / 2 3 x 16

= 0.009
c = 1/ 4 3 x f x r x RL
= 1 / 4 3 x 50 x 0.009 x (16/0.1)
= 2000 F
selected value of c = 2200 F / 25 V


with this value
c = 1/ 4 3 x 2200 F x 160
= 0.0082
Vrms = r x Vdc
= 0.0082 x 16

= 0.1312 V Vrpp = 0.45 V
Selected capacitor C12 to C20 and C21 to C23 = 2200 F / 25 V

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PIV > Vm
> 17 V If > I1

Diodes

PIV = Vm = 22.44 V
IN4007 diodes are selected which have
I(avg) = 1 A & I peak = 10A
Same diodes is used across relay coil as a
> 100 mA
selected diodes D26 to D57 are IN4007

Transformer

Transformer used here is a signal core six isolated
secondary with rating 12-0, 500 mA each. E. Design of Protection current
This circuit needs +12 V dc power supply for its operation. We can use IC7812 regulator IC for this purpose.


Here Vout = 12 V V = 2 V
Vin = Vout + V
= 12 + 2 = 14 V
i.e., unregulated dc input voltage is 14 V Assuming ripple voltage is 14 V
Vdc = 14 + Vrpp / 2
= 14 + 5/2 = 16.5 V
Vm (rectifier) = 14 + 5 = 19 V
Vm (secondary) = 19 +2 Vd = 19 + (20 x 0.7)
= 19 + 1.4 = 20.4 V
Assuming transformer regulation to be 10%
Vm (secondary) = 20.4 (10% of Vm (secondary))
= 20.4 + 2.04
= 22.44 volts

Vm ac = 230 Vrms
Vm (primary) = 230 x 2 = 325 V
Turns ratio = Vm (primary) / Vm (secondary)
= 325 / 22.44
= 15:1
free wheeling diode.
Overload and short circuit current is assumed to be 3 A
Selected Rsense = 1
Power rating R sense = I2R = 32 x 1

= 9 W R sense is selected as 1 , 10 W
After R sense diode bridge is kept so as to obtained pure dc
voltage. Again IN4007 diodes are used in bridge. After that


RC combination with value
R68 = 10 k & C25 =10 F / 25 V is used as dummy load.

Design of comparator

Select R70 to R71 = 1k
To adjust the voltage at point x , so that it will be
equal to voltage at output across R69. one preset is used. Its value is 4k7. Transistor SL100 is used to drive the relay. One pull up resistor of 1k value is used as the output of comparator.
III . Experimental Results

Table No.1:Variation in the speed of the motor as a function of inverter frequency

Table No.2: Variation in the speed of the motor as a function of load at constant frequency of 33.3 Hz




Now,
Vrms = Vrpp / 2 3 = 5/2 3 = 1.443 V Ripple factor r = Vrms / Vdc = 1.443 / 16.5
= 0.0875
Assuming Idc = 500 mA

Let us calculate the value of filter capacitor.

C3 = C1 = Idc / 4 3 .f. Vrms

= 500 x 10-3 / 4 x 3 x 50 x 1.443
= 999.7 F.
selecting value of C3 = 1000 F / 25 V
Actually Vdc = 4 x f x CR1 / (1 + 4 x f x C x R1) x Vm
= 0.868 Vm
Vdc = 0.868 x 22.44
= 19.48 V

Selection of Diodes



I peak = [2.63 r / (1 + 3 r) ] Vm C
= [2.63 x 0.0875 / (1 + 3 x 0.0875) ] x
22.44 x 1000 x 10-6 x 2 x 50
= 4.63 A
I (avg) = Il / 2 = 500 / 2 = 250 mA

Table No.3: Variation in the speed of the motor as a function of load at constant frequency of 50 Hz.

TABLE I

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TABLE II

Fig. 3.5 Speed Vs Torque at Constant Frequency = 50 Hz

2000

1800

1600

Frequency Vs Speed Characteristics

2000

1800

1600 Frequency Vs Expected

Speed

IV . Conclusion

A Design of PMSM drive system for EPS application has been presented in this paper . we conclude that, by varying the inverter frequency, the speed & Torque of the motor also gets varied. If the frequency is kept constant at particular value, the speed of the motor also remains constant, irrespective of the load. It runs at synchronous speed. But torque varying irrespective of the load. The experimental results prove that

1400

1200

1000

800

30 35 40 45 50 55 60

Fre que ncy (Hz)

1400

1200

1000

800

Frequency Vs Measured

Speed

the PMSM drive presented in this paper is suitable for Electric
Power Steering used in Automotive Application.

V. References

[1] T. M. Jahns, G. B. Kliman, and T. W. Neuman, “Interior PM synchronous motors for adjustable speed drives,” IEEE Trans. Ind. Appl., vol. IA-22, no.


Fig3.1 Frequency Vs Speed characteristics

4, pp. 738–747, Jul./Aug. 1986.

1200

1000

800

600

400

200

0

Speed Vs Load

0 500 1000 1500 2000 2500 3000

Load (gm)

[2] B. K. Bose, Power Electronics and Variable FrequencyDrives . Piscataway, NJ: IEEE Press, 1996.

[3] M. Kamiya, “Development of Traction Drive Motors for the Toyota Hybrid System,” pp. 1474–1481 in 2005 International Power Electronics Conference (IPEC 2005).

[4] Teck-seng Low, Mohanned.A. Jabbar, “Permanent Magnet Motors for

Brushless Operation”, IEEE trans. Industry application Vol.-26 Jan/Feb

Fig. 3.2 Speed Vs Load Characteristics at Constant Frequency = 33.3 Hz

1990, pp 124-129.

1600

1400

1200

1000

800

600

400

200

0

Speed Vs Load

0 500 1000 1500 2000 2500 3000

Load (gm)

[5] T.S. Low, M.F. Rahman, “Comparison of two Control Strategies in development if High-Torque Electronically Commutated Drive”, IEEE PROCEEDINGS-B Vol.-139 No.-1 Jan 1992, pp 26-36.

[6] L.Zhong, M.F. Rahman, “Analysis of Direct Torque Control in Permanent

Magnet Synchronous Motor Drive”, IEEE TRANS. Power Electronics Vol.-

12 No. 3, May 1997, pp 528-536.

[7] Pragasen Pillay, Ramu Krishnan. “Control Characteristics and Speed

Fig. 3.3 Speed Vs Load Characteristics at Constant Frequency = 50 Hz

Torque Vs Output Power

Controller Design for a High-Performance Permanent Magnet Synchronous

Motor Drive”, IEEE TRANS. Power Electronics Vol.-5 No-2 April 1990, pp

151-158.

100

90

80

70

60

50

40

30

20

10

0

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Output Powe r

[8] Michal Lajoie-Mazenc, J.Hector, “Study and Implementation of Hysteresis Controlled Inverter on a Permanent Magnet Synchronous Machine”, IEEE TRANS. Industry Applications Vol.-1 A-21 No.-2

March/April 1985, pp 408-413.

[9] Pragasen Pillay, Ramu Krishnan, “Modeling Simulation and Analysis of

Fig. 3.4 Torque Vs Output Power at frequency 33.3 Hz

Speed Vs Torque

1600

1400

1200

1000

800

600

400

200

0

Permanent Magnet Motor Drives”Part 1: The Permanent Magnet Synchronous Drive.Part 2: The Brushless Motor Drive.IEEE TRANS. Industry Applications, Vol.-25 No.-2 March/April 1989 pp 265-279.

[10] Dietrich Naunin, Hans-Christian Reuss, “Synchronous Servo Drive: A compact solution of control problems by means of a single-chip Microcomputer”, IEEE TRANS. Industry Applications, Vol.-26, May/June

1990, pp 408-414.

0 0.2 0.4 0.6 0.8 1

Torque(N-m)

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